This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-301063, filed Sep. 29, 2000, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to an electrically rewritable nonvolatile semiconductor memory device, and a system thereof.
2. Description of the Related Art
A conventional flash memory has a digital control interface. Then, in addition to a digital control signal terminal, the flash memory has a power source terminal, and a writing and erasing power source terminal. These are DC inputs, which are controlled in accordance with a digital control signal from the outside inside of the flash memory to be rectified into an appropriate waveform and applied to a memory cell. As a consequence, a large number of control circuits which are referred to as peripheral circuits are provided in addition to the memory cells in order to create a signal required for the reading, writing, and erasing of the memory cell inside of the flash memories.
Conventionally, a large number of peripheral circuits are formed in a chip for creating a signal required for the reading, writing, and erasing of the memory cell inside of the flash memory with the result that the chip size is enlarged and a cost thereof is increased. However, when an attempt is made to directly control the memory cell from the outside, an outside wiring load is increased.
Furthermore, conventionally, a large number of detachable memory devices are provided which use a flash memory. For example, a smart medium, a compact flash, a memory stick, an SD card or the like is provided. An interface of the smart medium is the interface itself of a NAND flash memory. Other devices are similar to the interface of a magnetic storage device. In any way, like the magnetic memory device, file data and a logical address are received and memorized under the file control on the host side. A file control system is required on the host side.
In this manner, the conventional memory device using the flash memory is controlled under the file control on the host side, so that the performance thereof is deteriorated. For example, when the minimum rewriting unit of the flash memory is larger than the minimum unit of the file control on the host side, it is required to rewrite even the file data which is not required to be rewritten inside of the flash memory at the time of rewriting one piece of file data. However, when an attempt is made to conduct the file control on the side of the flash memory system, there arises a problem as to how the interface is dealt with.
A semiconductor integrated circuit device according to an embodiment of the present invention comprises: a first semiconductor substrate, in which, a memory cell array including a plurality of nonvolatile semiconductor memory cells, a plurality of bit lines electrically connected to the memory cell array, a plurality of word lines electrically connected to the memory cell array, a plurality of input terminals, and a plurality of transfer gate transistors each having one end electrically connected to a corresponding one of the word lines and another end electrically connected to a corresponding one of the input terminals, are provided; and a second semiconductor substrate, in which, a plurality of output terminals electrically connected to the input terminals of the first semiconductor substrate, and a word line control circuit configured to control the word lines and electrically connected to the output terminals, are provided.
A nonvolatile semiconductor memory device according to an embodiment of the present invention comprises: a first semiconductor substrate, in which, a memory having a memory cell array including a plurality of nonvolatile semiconductor memory cells, is provided; and a second semiconductor substrate, in which, a control portion configured to control the memory, a network interface connectable to a network, a file management portion connected to the network interface configured to manage a relation between a data file given from the network and an address of the memory cell array, and a memory interface connected to the file management portion configured to convert a signal given from the network to a signal which is capable of being used at the control portion, are provided.